Assertion Based Verification -- to SVA -- SVA Simulation Methodology -- SVA for Finite State Machines -- SVA for Data Intensive Designs -- SVA for Memories -- SVA for Protocol Interface -- Checking the Checker.SystemVerilog language consists of three very specific areas of constructs -- design, assertions and testbench. Assertions add a whole new dimension to the ASIC verification process. Asse…
to SoC Design -- Platform-Centric SoC Design Methodology -- to UML and XML -- Library of Platform Objects -- UML Profile for Codesign Modeling Frame (CMF) -- Design Case Study: A Digital Camera -- Summary.Increasing system complexity has created a pressing need for better design tools and associated methodologies and languages for meeting the stringent time to market and cost constraints. Platf…
Diffusion in Bulk Solids and Thin Films: Some Phenomenological Examples -- Solid State Diffusion and Bulk Properties -- Atomistic Computer Simulation of Diffusion -- Bulk and Grain Boundary Diffusion in Intermetallic Compounds -- Diffusion Barriers in Semiconductor Devices/Circuits -- Reactive Phase Formation: Some Theory and Applications -- Metal Diffusion in Polymers and on Polymer Surfaces -…
Indonesian Journal of Applied Physics Volume 04 No 2 Oktober 2014 (Rak 7 - N : MIPA)