Session 1: Low-Power Processors -- Session 2: Code Optimization for Low-Power -- Session 3: High-Level Design -- Session 4: Telecommunications and Signal Processing -- Session 5: Low-Power Circuits -- Session 6: System-on-Chip Design -- Session 7: Busses and Interconnections -- Session 8: Modeling -- Session 9: Design Automation -- Session 10: Low-Power Techniques -- Session 11: Memory and Regi…
Overview -- Processor Design Issues -- RISC Principles -- Architectures -- MIPS Architecture -- SPARC Architecture -- PowerPC Architecture -- Itanium Architecture -- ARM Architecture -- MIPS Assembly Language -- SPIM Simulator and Debugger -- Assembly Language Overview -- Procedures and the Stack -- Addressing Modes -- Arithmetic Instructions -- Conditional Execution -- Logical and Shift Operat…
Basic Concepts and Related Work -- Requirements of an Integrated Architecture -- Integrated System Architecture for Event-Triggered and Time-Triggered Control Paradigms -- Controller Area Network Emulation in the Time-Triggered Architecture -- Results and Validation -- Conclusion.Event-Triggered and Time-Triggered Control Paradigms presents a valuable survey about existing architectures for saf…