Microarchitecture- and Circuit-Level Techniques -- An Optimized Front-End Physical Register File with Banking and Writeback Filtering -- Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization -- Bit-Sliced Datapath for Energy-Efficient High Performance Microprocessors -- Low-Overhead Core Swapping for Thermal Management -- Power-Aware Memory and…
Compilers -- Runtime Biased Pointer Reuse Analysis and Its Application to Energy Efficiency -- Inter-program Compilation for Disk Energy Reduction -- Embedded Systems -- Energy Consumption in Mobile Devices: Why Future Systems Need Requirements–Aware Energy Scale-Down -- Efficient Scratchpad Allocation Algorithms for Energy Constrained Embedded Systems -- Online Prediction of Battery Lifetime…
Keynote -- Platform Thinking in Embedded Systems -- Reconfigurable System Design and Implementations -- Interprocedural Optimization for Dynamic Hardware Configurations -- Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques -- Reconfigurable Multiple Operation Array -- RAPANUI: Rapid Prototyping for Media Processor Architecture Exploration…
Tutorial -- An Overview of the SAE Architecture Analysis & Design Language (AADL) Standard: A Basis for Model-Based Architecture-Driven Embedded Systems Engineering -- Models and Analysis -- Deploying QoS Contracts in the Architectural Level -- Hierarchical Composition and Abstraction in Architecture Models -- Pattern-Based Analysis of an Embedded Real-Time System Architecture -- An ADL Centric…
EvoBIO Contributions -- Evolutionary Biclustering of Microarray Data -- A Fuzzy Viterbi Algorithm for Improved Sequence Alignment and Searching of Proteins -- Tabu Search Method for Determining Sequences of Amino Acids in Long Polypeptides -- Order Preserving Clustering over Multiple Time Course Experiments -- Can Neural Network Constraints in GP Provide Power to Detect Genes Associated with Hu…
Keynote I -- A Process Toward Total Dependability – Airbus Fly-by-Wire Paradigm -- Session 1A: Distributed Algorithms -- Building and Using Quorums Despite any Number of Process of Crashes -- Failure Detection with Booting in Partially Synchronous Systems -- Total Order Communications: A Practical Analysis -- Gracefully Degrading Fair Exchange with Security Modules -- Session 1B: Fault Tolera…
Invited Talks -- Is Formal Verification Bound to Remain a Junior Partner of Simulation? -- Verification Challenges in Configurable Processor Design with ASIP Meister -- Tutorial -- Towards the Pervasive Verification of Automotive Systems -- Functional Approaches to Design Description -- Wired: Wire-Aware Circuit Design -- Formalization of the DE2 Language -- Game Solving Approaches -- Finding a…
Modeling Permanent Faults -- Test Generation: A Symbolic Approach -- Test Generation: A Heuristic Approach -- Test Generation: A Hierarchical Approach -- Test Program Generation from High-level Microprocessor Descriptions -- Tackling Concurrency and Timing Problems -- An Approach to System-level Design for Test -- System-level Dependability Analysis.New manufacturing technologies have made poss…
Background Material -- Systemc Discrete-Event Kernel -- Few Words about Implementation Class Hierarchy -- Synchronous Data Flow Kernel in SystemC -- Communicating Sequential Processes Kernel in SystemC -- Finite State Machine Kernel in SystemC -- Systemc Kernel Application Protocol Interface (API) -- Heterogeneous Examples -- Epilogue.SystemC Kernel Extensions for Heterogeneous System Modeling …
Keynote Speech -- Research Issues in Adapting Computing to Small Devices -- Mobile Context-Aware Systems – Linking the Physical and Digital World -- Architecture -- A Data Transformations Based Approach for Optimizing Memory and Cache Locality on Distributed Memory Multiprocessors -- A Fetch Policy Maximizing Throughput and Fairness for Two-Context SMT Processors -- A Loop Transformation Usin…